This application claims priority of Taiwan patent Application No. 90101277, filed on Jan. 19, 2001.
1. Field of the Invention
This invention relates to a method for manufacturing a low-profile semiconductor device.
2. Description of the Related Art
The sizes of semiconductor chips can vary widely with different chip packaging techniques. With the rapid advancement in electronic devices, minimization of profiles of semiconductor chips has been a major concern of manufactures. For instance, the profiles of Flip-Chips can be made relatively low by current packaging techniques. However, there is still a need to further reduce the profiles of the Flip-Chips.
Therefore, the main object of the present invention is to provide a method for manufacturing a low-profile semiconductor device.
Another object of the present invention is to provide a low-profile semiconductor device.
Yet another object of the present invention is to provide a method for forming a conductive bump on a bonding pad on a pad-mounting surface of a semiconductor chip so as to reduce the profile of a semiconductor device that includes the semiconductor chip.
Still another object of the present invention is to provide a semiconductor device with a conductive bump that can lead to a reduced profile for the semiconductor device.
According to one aspect of the present invention, there is provided a method for manufacturing a semiconductor device that includes a semiconductor chip and a substrate. The substrate has a chip-mounting surface provided with a plurality of contact pads. The semiconductor chip has a pad-mounting surface provided with a plurality of bonding pads which are to be connected to corresponding ones of the contact pads. The method comprises the steps of: forming a first conductive bump on each of the contact pads of the substrate; forming a second conductive bump on each of the bonding pads of the semiconductor chip; forming a plurality of spaced apart dielectric supporting pads on a selected one of the chip-mounting surface of the substrate and the pad-mounting surface of the semiconductor chip at positions offset from the first and second conductive bumps; mounting the semiconductor chip on the substrate to confine therebetween a gap and to permit each of the first conductive bumps to be vertically registered with and to contact a respective one of the second conductive bumps and to permit the supporting pads to interconnect the chip-mounting surface and the pad-mounting surface; reflowing the first and second conductive bumps in a manner that each of the first conductive bumps is bonded to the respective one of the second conductive bumps; and forming an insulating layer that fills in the gap and that encapsulates the supporting pads and the first and second conductive bumps.
According to another aspect of the present invention, a semiconductor device comprises: a substrate having a chip-mounting surface provided with a plurality of contact pads and a plurality of first conductive bumps formed respectively on the contact pads; a semiconductor chip having a pad-mounting surface provided with a plurality of bonding pads and a plurality of second conductive bumps formed respectively on the bonding pads, the semiconductor chip being mounted on the substrate to confine therebetween a gap, the second conductive bumps being respectively registered with and being bonded to the first conductive bumps; a plurality of spaced apart dielectric supporting pads disposed in the gap at positions offset from the first and second bumps, the supporting pads interconnecting the chip-mounting surface of the substrate and the pad-mounting surface of the semiconductor chip; and an insulating layer that fills in the gap and that encapsulates the supporting pads and the first and second conductive bumps.
According to yet another aspect of the present invention, there is provided a method for forming a conductive bump on a bonding pad on a pad-mounting surface of a semiconductor chip. The method comprises the steps of: applying an adhesive layer to a central area of the bonding pad; laying a ball body on the adhesive layer, the ball body having a lower half with a lower hemisphere surface that curves upwardly from an upper surface of the adhesive layer and that cooperates with the upper surface of the adhesive layer to define a groove therebetween; and forming a conductive layer that fills the groove, that encapsulates and that is bonded to the ball body and the adhesive layer, and that covers a remaining area of the bonding pad around the central area.
According to a further aspect of the present invention, a semiconductor device comprises: a semiconductor chip having a pad-mounting surface provided with at least a bonding pad; and a conductive bump formed on the bonding pad and having an adhesive layer that covers a central area of the bonding pad, a ball body that is laid on and that is bonded to the adhesive layer, and a conductive layer that encapsulates and that is bonded to the ball body and the adhesive layer and that covers a remaining area of the bonding pad around the central area, the ball body having a lower half with a lower hemisphere surface that curves upwardly from an upper surface of the adhesive layer and that cooperates with the upper surface of the adhesive layer to define a groove therebetween, the conductive layer filling the groove.